1. Field of the Invention
This invention relates generally to integrated circuits and bipolar transistors formed therein, and relates more particularly to a structure forming, and a process for fabricating, a self-aligned metal silicide base contact for a bipolar transistor.
2. Description of the Prior Art
Parasitic capacitances and resistances limit the switching speed of a bipolar transistor. Two related factors that restrict transistor switching speed are: (1) a parasitic base resistance between the base contact and the active area of the transistor, and (2) a parasitic capacitance between the base region and the collector region. Each time that the transistor switches, the base current charges or discharges this parasitic capacitance. The base current is impeded by the parasitic base resistance. To increase switching speed, the product of the parasitic base resistance and the parasitic capacitance must be reduced.
Certain design parameters also affect the switching speed of a bipolar transistor. The dopant levels of the p and n conductivity regions of the transistor affect the magnitude of the parasitic base resistance and capacitance. While increasing the dopant level of the base region causes the parasitic base resistance to decrease, it also causes the parasitic capacitance to increase by a proportionate amount. The net result is no gain in switching speed.
Another design parameter, the physical dimensions of the transistor, affects the magnitude of the parasitic base resistance. The magnitude of the parasitic base resistance is proportional to the distance between the active area of the transistor and the base contact, where the base contact is a conductor that supplies the base current to the base region. It is desirable to minimize this distance to minimize the parasitic base resistance. Since in a vertical device the active area of the transistor is directly below the emitter, the distance to be minimized is the distance between the emitter and the base contact. The emitter and the base contact must be electrically isolated for the transistor to function. A lower bound on the distance between the emitter and the base contact is the thickness of a layer of insulation that electrically separates the two.
In prior art bipolar transistors, insulation between the emitter and the base contact is provided by a region of silicon dioxide. This oxide region is disposed between the emitter and a metal connection that contacts the top of the base region and forms the base contact. In fabricating such prior art bipolar transistors, the oxide region is first formed on top of the emitter and base regions, and is then photolithographically patterned to create openings to the emitter and base regions. Metal is then deposited in the openings, with the base contact formed by the metal in the opening to the base. The minimum distance between the base contact and emitter is limited by the capabilities of the photolithographic process. Separation distances between the emitter and base contact in the range of two to three micrometers have been achieved in prior art bipolar transistors.
Other design techniques are known to be useful in increasing the switching performance of bipolar transistors. One technique uses a Schottky diode connected across the base and collector of a bipolar transistor to form a Schottky clamped transistor. The Schottky diode limits the charge stored by the base to increase switching speed. Another technique uses tunnel emitters to speed up the transistor.